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AGX Orin M.2 C4 PCIe DTS Ranges Values

Mar 04, 2024

Using an FPGA as ep with 512MB BAR, the Orin will not boot with the following error:
ASSERT [PciHostBridgeDxe] /dvs/git/dirty/git-master_linux/out/nvidia/bootloader/uefi/Jetson_RELEASE/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c(879): (Translation & Alignment) == 0


Through my research I have found that there may be a limit to eps with only up to 128MB.

I have tried to change the ranges in the dts, but need to be sure that I am doing it right. Also, I am unsure of which sections correspond to C4 (m.2 key M) and C5 (the main PCIe connector).



  1. Is pcie@14140000 the correct section? If not, can you please tell me which one is?

  2. To update the dts, is the following correct?:


sudo dtc -O dts /boot/dtb/kernel_tegra234-p3701-0000-p3737-0000.dtb > mine.dts
# Edit
sudo dtc -O dtb mine.dts -o /boot/dtb/kernel_tegra234-p3701-0000-p3737-0000.dtb
# reboot


  1. What values would allow the Orin to boot with the FPGA (512MB BAR)?

    Thanks