Issues with enabling AGX Orin PCIe C7?
Mar 04, 2024
Hello,
My goal is to get the C7 pins of PCIe enabled in root mode.
I’ve followed the instructions laid out here: Jetson AGX Orin Platform Adaptation and Bring-Up — Jetson Linux
Developer Guide 34.1 documentation
Updated pinmux and gpio bootloader dtsi files as needed for C7 connections.
pex_l7_clkreq_n_pag0 {
nvidia,pins = "pex_l7_clkreq_n_pag0";
nvidia,function = "pe7";
nvidia,pull =;
nvidia,tristate =;
nvidia,enable-input =;
nvidia,io-high-voltage =;
nvidia,lpdr =;
};
pex_l7_rst_n_pag1 {
nvidia,pins = "pex_l7_rst_n_pag1";
nvidia,function = "pe7";
nvidia,pull =;
nvidia,tristate =;
nvidia,enable-input =;
nvidia,io-high-voltage =;
nvidia,lpdr =;
};
Updated the tegra234-p3737-pcie.dtsi file such that pcie@141e0000 is enabled:
- pcie@141e0000 {
status = "okay";
num-lanes =- ;
- ;
phys = <&p2u_gbe_0>, <&p2u_gbe_1>, <&p2u_gbe_2>,
<&p2u_gbe_3>, <&p2u_gbe_4>, <&p2u_gbe_5>,
<&p2u_gbe_6>, <&p2u_gbe_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3",
"p2u-4", "p2u-5", "p2u-6", "p2u-7";
- };
- Updated ODMDATA to:
ODMDATA=“gbe-uphy-config-0,hsstp-lane-map-3,hsio-uphy-config-16,nvhs-uphy-config-0”;
Probing the reset signal for C7 we noticed that it remains low and doesn’t toggle at any point on power-up.
Are there any further changes in bootloader or kernel that have been missed?