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Scanning or detecting PCIE device

Mar 04, 2024

Hi,

We design a carrier for Nano.

The only one PCIE port of Nano can be switched between M.2 E key and M key.

Below figure is the topology.
Topology


One problem we faced, if we plug an SSD on M key, E key is empty and MUX is set on the path 1 to A. It’s supposed nothing to be detected. However, after booting to OS, SSD can be found and the link width is x2.

We did some experiments, please check below table.
Lanes


Here are the questions.



  1. The PCIE device scan mechanism of Nano?

  2. By the table-Case 3, 4, 5, it seems that there’s reversal lane scan?

  3. If we want to avoid the problem in the previous paragraph we mentioned and hardware won’t be changed, how can software do?


Thanks.

Wayne.