Pcie clock bufferization

Hello,

We need to create a device based on AGX Xavier/Xavier NX with a lot of ethernet ports.

There are different ways:

USB hubs + USB ethernet card

PCIe switches + PCIe ethernet card

Etcetera

We have a crazy idea to use PCIe clock buffer IC

The theoretical possibility to get 8 PCIe x1 from 1 PCIe x8. Split PCIe.

An example of such devices:

https://www.renesas.com/us/en/products/clocks-timing/application-specific-clocks/pci-express-clocks/9dbl0851-8-output-33v-pcie-zero-delayfanout-clock-buffer

Is it possible to split PCIe into Jetson like this?

Thanks.