Jetson AGX Orig disable PCIe IOMMU error
Mar 04, 2024
Hi, I want to extend Jetson AGX Orig with Xilinx FX600 on PCIe x8/x16. I need to disable PCIe IOMMU to compatible with original code.
I disble all PCIe controller nodes that modification as following:
diff --git a/hardware/nvidia/soc/t23x/kernel-dts/tegra234-soc/tegra234-soc-pcie.dtsi b/../../../hardware/nvidia/soc/t23x/kernel-dts/tegra234-soc/tegra234-soc-pcie.dtsi
old mode 100644
new mode 100755
index 40d3284..f0974e4
--- a/hardware/nvidia/soc/t23x/kernel-dts/tegra234-soc/tegra234-soc-pcie.dtsi
+++ b/../../../hardware/nvidia/soc/t23x/kernel-dts/tegra234-soc/tegra234-soc-pcie.dtsi
@@ -465,12 +465,12 @@
num-ib-windows = ;
num-ob-windows = ;
- //iommus = <&smmu_niso0 TEGRA_SID_NISO0_PCIE5>;
- //iommu-map = <0x0 &smmu_niso0 TEGRA_SID_NISO0_PCIE5 0x1000>;
+ iommus = <&smmu_niso0 TEGRA_SID_NISO0_PCIE5>;
+ iommu-map = <0x0 &smmu_niso0 TEGRA_SID_NISO0_PCIE5 0x1000>;
msi-parent = <&gic_v2m TEGRA_SID_NISO0_PCIE5>;
msi-map = <0x0 &gic_v2m TEGRA_SID_NISO0_PCIE5 0x1000>;
- //dma-coherent;
- //iommu-map-mask = <0x0>;
+ dma-coherent;
+ iommu-map-mask = <0x0>;
nvidia,cfg-link-cap-l1sub = <0x1c4>;
nvidia,cap-pl16g-status = <0x174>;
But i get those error message:
x@tegra-ubuntu:~$ [ 28.640756] arm-smmu 8000000.iommu: Unexpected global fault, this could be serious
[ 28.648555] arm-smmu 8000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000c05, GFSYNR2 0x0000000 0
[ 28.659023] arm-smmu 8000000.iommu: Unexpected global fault, this could be serious
[ 28.666803] arm-smmu 8000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000405, GFSYNR2 0x0000000 0
[ 28.678425] mc-err: (255) csr_pcie1r: EMEM address decode error
[ 28.684545] mc-err: status = 0x200640da; hi_addr_reg = 0x000000ff addr = 0xffffffff00
[ 28.692812] mc-err: secure: yes, access-type: read
[ 28.697988] pcieport 0001:00:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, (Recei ver ID)
[ 28.709037] pcieport 0001:00:00.0: device [10de:229e] error status/mask=00040000/00400000
[ 28.717647] pcieport 0001:00:00.0: [18] MalfTLP (First)
[ 28.724702] pcieport 0001:00:00.0: AER: TLP Header: 00000003 01000178 fffffffc 00000000
Is this way too rude cause error? which PCIe controller node need to disable?