PCI detection problems during system booting 1

Hi all,

in the following link you have my discussion about a problem with Jetson TX2 and the pcie discovering. As summary, we develop a board which connects Jetson TX2 and FPGA Ultrascale via PCIexpress. In general, the discovering process works correctly; however, sometimes, Jetson does not detect the FPGA PCIe link, and we must reset it twice or three times until the FPGA is discovered correclty again.

Following the comments of @linuxdev, I discard problems on power-up because FPGA is fully programmed before even the processor starts the booting, and additionally, this problem happens when the TX2 is reset, and in this process, the FPGA is not reprogrammed.

I focus on PCIe reset signal, and that maybe, the FPGA PCIe core is not ready after a reset. I fixed this reset signal to ‘1’ in the FPGA side, so this core is not reset by Jetson PCIe reset signal. However, this causes an permanent error during discovering process, and link 0 is not stablished. In normal operation, link 0 is stablished, but then an error takes place.

Any suggestions?

Thanks and regards,

Antonio.