PCIe C4 in endpoint mode for AGX Xavier

Hello, Nvidia community.

We developed custom carrier board for AGX Xavier and want to connect two Xaviers via PCIe. We used C4 controller (UPHY 8 & 9, PEX_CLK4, PEX_C4_CLKREQ, PEX_C4_RST) for that purpose. However we have an issue on how to enable endpoint mode for C4 of one of Xaviers using ODMDATA. What I tried is setting ODMDATA=0x9191000; but according to /sys/firmware/devicetree/base/chosen/plugin-manager/odm-data it only sets c5 and not c4 in endpoint mode.

... disable-pcie-c4-endpoint  enable-pcie-c5-endpoint ...

What bit of ODMDATA should I set to enable C4 in endpoint mode?

This is how I test the set up. I enable pci_epf_nv_test on EP device and reboot RP device. Here is the dmesg I see on EP:

dmesg | grep pcie

[    1.144971] iommu: Adding device 14160000.pcie_ep to group 0

[    1.145775] iommu: Adding device 14180000.pcie to group 1

[    1.149366] iommu: Adding device 14140000.pcie to group 2

[    3.603025] pciehp: PCI Express Hot Plug Controller Driver version: 0.4

[    4.649387] tegra-pcie-dw 14160000.pcie_ep: Setting init speed to max speed

[    4.656206] tegra-pcie-dw 14160000.pcie_ep: Disabling advertisement of all ASPM states

[    4.665791] tegra-pcie-dw 14180000.pcie: Setting init speed to max speed

[    4.671674] OF: PCI: host bridge /pcie@14180000 ranges:

[    4.802354] tegra-pcie-dw 14180000.pcie: link is up

[    4.802657] tegra-pcie-dw 14180000.pcie: PCI host bridge to bus 0000:00

[    4.811857] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt

[    4.824757] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded

[    4.824825] aer 0000:00:00.0:pcie002: service driver aer loaded

[    4.829875] tegra-pcie-dw 14140000.pcie: Setting init speed to max speed

[    4.830700] OF: PCI: host bridge /pcie@14140000 ranges:

[    4.938319] tegra-pcie-dw 14140000.pcie: link is up

[    4.938651] tegra-pcie-dw 14140000.pcie: PCI host bridge to bus 0003:00

[    4.993207] pcieport 0003:00:00.0: Signaling PME through PCIe PME interrupt

[    5.006251] pcie_pme 0003:00:00.0:pcie001: service driver pcie_pme loaded

[    5.006376] aer 0003:00:00.0:pcie002: service driver aer loaded

[  297.054522] tegra-pcie-dw 14160000.pcie_ep: UPHY init failed for PCIe EP:-22

I also get the same error tegra-pcie-dw 14160000.pcie_ep: UPHY init failed for PCIe EP:-22 if I flap RST with

busybox devmem 0x14160000 w 0x00001804

busybox devmem 0x14160000 w 0x00001805

And I see interrupts on pex_rst:

cat /proc/interrupts | grep pex_rst

 259:          3          0          0          0          0          0          0          0  tegra-gpio   89 Edge      pex_rst

My current dts settings:

Root port:

	pcie@14160000 {

		compatible = "nvidia,tegra194-pcie";

		nvidia,device-id = /bits/ 16 <0x1AD5>;

		nvidia,disable-aspm-states = <0xf>;

		nvidia,disable-clock-request;

		status = "okay";

		nvidia,max-speed = 
;

		phys = <&p2u_8>, <&p2u_9>;

		phy-names = "pcie-p2u-0", "pcie-p2u-1";

		num-lanes = 
;

		vddio-pex-ctl-supply = <&p2888_spmic_sd3>;

		nvidia,host1x = <&host1x>;

	};

EP:

	pcie_ep@14160000 {

		compatible = "nvidia,tegra194-pcie-ep";

		status = "okay";

		phys = <&p2u_8>, <&p2u_9>;

		phy-names = "pcie-p2u-0", "pcie-p2u-1";

		nvidia,pex-rst-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(L, 1)

			GPIO_ACTIVE_LOW>;

		vddio-pex-ctl-supply = <&p2888_spmic_sd3>;

		nvidia,host1x = <&host1x>;

		num-lanes = 
;

		nvidia,max-speed = 
;

	};

Please give me some useful information on how to make this configuration work.

Thank you!