Credit flow control value for PCIe

Hi,

We have an FPGA system connected with Jetson Xavier NX on M.2 PCIe port. For some reason FPGA is not able to initiate the transaction with Jetson. It is suspected that the value of flow control credit could be the reason.

I have following questions:

1. How can I verify that the flow control credit is enabled/disabled?


2. How to know the flow control credit’s current value?


3. How to set the value of flow control credit if possible? Which all register are responsible for that?

I tried to read PCIE_X4_EP_PF0_PORT_LOGIC_LANE_SKEW_OFF_0 register which has FLOW_CTRL_DISABLE field and PCIE_X4_RC_PF0_PORT_LOGIC_TX_P_FC_CREDIT_STATUS_OFF_0 which has TX_P_HEADER_FC_CREDIT and TX_P_DATA_FC_CREDIT fields using devmem2 utility but the board reboots on reading them.

These registers I tried reading were for the block PCIE_C4_CTL block which has memory mapped at 0x14160000.

Regards,

Meet