M.2 E PCIe data link down

Hi,

We are designing our own carrier for xavier SOM. We are facing an issue on M.2 E.

We duplicate the circuit from xavier-devkit for M.2 E and M.2 M.

The SSD plugged in M.2 M key slot works. But the wifi plugged in M.2 E key is NOT detected!

We flashed devkit with our pinmux, kernel, and device-tree. And wifi is detected on devkit.

Therefore, most likely the issue is on the hardware related to M.2 E on our carrier.

This is the kernel dmesg:

[   12.460344] tegra-pcie-dw 14140000.pcie: Setting init speed to max speed

[   12.461215] OF: PCI: host bridge /pcie@14140000 ranges:

[   12.975562] tegra-pcie-dw 14140000.pcie: link is down

[   12.975789] tegra-pcie-dw 14140000.pcie: PCI host bridge to bus 0003:00

[   12.979469] tegra-pcie-dw 14140000.pcie: PCIe link is not up...!

There are two things that I realized that may cause issue:

1. 
   

   the AC coupling capacitors on UPHY TX lines are 0.22 uF, whereas devkit is using 0.1 uF. I am not really sure this could cause any issue for GEN1 or GEN2 pcie. On OEM, it says it can be 0.1 uF or 0.22 uF. So, it seems both 0.1 uF and 0.22 uF should work for GEN1/GEN2. 0.22 uF is for GEN3/GEN4

   
   


2. 
   

   There is a OSC 32.768KHz oscillator. When we probe it, it seems it is oscillating faster than 32 KHz. We need to double check its oscillating frequency. Is 32KHz oscillator being used by wifi module connected on M.2 E key?

   
   


3. 
   

   It seems data link of PCIe is down. I think nvidia pcie driver get data link status from PCIE_X1_RC_PF0_PCIE_CAP_LINK_CONTROL_LINK_STATUS_REG_0 (offset 0x80 from configuration space). I think bit 29 indicates the data link layer status of pcie. What would be the cause of pcie data link down?

   
   


4. 
   

   Note that the USB on M.2 E is not working either. The wifi also has USB interface for Bluetooth function. But it is NOT detected either on USB bus. So, may be the issue is caused by some reset or power signals on M.2 E, because USB is not working either.

   
   


5. 
   

   I probed W_DISABLE1# and W_DISABLE2#, and they are 3.3V. I set them output drive 1 in pinmux and gpio-hog output-high in device-tree. May be I will also probe the 3.3V power pins on M.2 E. Any other pins that I should check?

   
   

Regards.