About PCIe Lane
Mar 04, 2024
Hello, I want to compare and confirm Jetson_TX2_NX_Interface_Comparison_Migration_AN_DA-10170-001_v1.0.pdf with Jetson_TX2_NX_Product_Design_Guide_DG-10141-001_v1.1.pdf.
Q1.Regarding “PCIe # 0, Lane 1” and “PCIe # 0, Lane 0” of “Tegra X2 Lanes”, the contents of “Tegra X2 Lanes” in the two tables are different. Which is the correct information?
Q2.Is “na” correct for “PCIe 2, Lane 0” in the “Jetson TX2NX Function Names” row of Table 5?
Q3.Is “PCIe #0, Lane 2” correct for “PCIe 0, Lane 2” in the “Module Pin Names” row of Table 5?
Best regards.
