Configuring the UPHY Lane
Mar 04, 2024
Hi NVIDIA Team,
I’m currently configuring the Orin NX UPHY Lane. The documentation shows this table:
![image](/uploads/20240229/e1ec3d687fd0576bde0ba309546daf74.png)
However it’s not completely clear to me the two configurations. The first option is to use CSI4_D[0:2]_RX0_TX0
and CSI4_D[1:3]_RX1_TX1
as one (PCIE x2)?
And the second option is to use CSI4_D[0:2]_RX0_TX0
and CSI4_D[1:3]_RX1_TX1
separately as two PCIE x1?
Thanks.